Arief S. Budiman

Arief S. Budiman
SEMI X AI – Catcher in the Die (CRDI): High Resolution, Rapid Stress/Warpage Metrology for Enabling Die-to-Wafer (D2W) Hybrid Bonding Integration (HBI) Scheme for Advanced 3D Semiconductor (SEMI) Packages in Artificial Intelligence (AI) and High Performance Computing (HPC) Chips

Arief S. Budiman

Speakers
University / Institution

Oregon Institute of Technology

Representing

USA

Abstract

The importance of stress-induced warpage/distortion in silicon semiconductor chips/wafers cannot be understated – especially in light of the most recent trends in the semiconductor industry for 3D Hybrid Integration/Packaging to enable the extreme high density integrated circuits for AI (Artificial Intelligence) and HPC (High Performance Computing) chips. Silicon is very brittle – microcracks and other damages (scratches, dents, pits, cleaves) can easily be found on surfaces of silicon semiconductor wafers and dies. Given residual stress in the wafers/dies, they may grow and propagate into large scale damage and distortions which will lower production yield, make both die-to-wafer (D2W) and wafer-to-wafer (W2W) alignment very difficult in manufacturing and eventually affect performance of the chips during operations. Controlling the stress in silicon wafers/dies is thus key. Die-level warpage and distortion control (especially in the context of Hybrid Bonding Integration/HBI schemes in semiconductor advanced packaging) has direct impact on bonding quality and placement accuracy, and thus immediately affects production yield, yet there is no system commercially available now in the semiconductor industry that offers the capability to track them closely at the die-level, during the various manufacturing/assembly processes, and at the needed spatial resolution accuracy. We present here in this paper a novel method of rapid stress-induced warpage/distortion metrology for silicon semiconductor wafers/dies at high resolution. It is non-X-ray Diffraction, but high resolution based on thin plate geometry and local surface curvature model according to Kirchhoff theory, combined with recent advances in laser interferometry instrumentation. In this paper, we demonstrate the first experimental findings on the technical feasibility of the novel technique on silicon thin plate samples and discuss paths for industrial implementation of the technique for use in semiconductor high volume manufacturing (HVM) as a metrology tool to enhance die placement accuracy and thus Cu-Cu bonding quality in the Die-to-Wafer Hybrid Bonding Integration (D2W HBI) Scheme crucial in realizing ultra-high density semiconductor packages and next generation assembly and systems packaging for AI and HPC chips.